PYNQ-Z1: Python Productivity for Zynq-7000 ARM/FPGA SoC (A-53)
PYNQ-Z1: Python Productivity for Zynq-7000 ARM/FPGA SoC
"• SoC Features:
• ZYNQ XC7Z020-1CLG400C
o 650MHz dual-core Cortex-A9 processor
o DDR3 memory controller with 8 DMA channels and 4 high performance AXI3 slave ports
o High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
o Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
o Programmable from JTAG, Quad-SPI flash, and microSD card
o Programmable logic equivalent to Artix-7 FPGA
§ 13,300 logic slices, each with four 6-input LUTs and 8 flip-flops
§ 630 KB of fast block RAM
§ 4 clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
§ 220 DSP slices
§ On-chip analog-to-digital converter (XADC)
• Memory:
o 512MB DDR3 with 16-bit bus @ 1050Mbps
o 16MB Quad-SPI Flash with factory programmed globally unique identifier (48-bit EUI-48/64™ compatible).
o MicroSD slot
• Power:
o Powered from USB or any 7V-15V source (see recommended products)
• USB and Ethernet:
o USB-JTAG Programming circuitry
o USB-UART bridge
o USB OTG PHY (supports host only)
o Gigabit Ethernet PHY
• Audio and Video:
o Electret microphone with pulse density modulated (PDM) output
o 3.5mm mono audio output jack, pulse-width modulated (PWM) format
o HDMI sink port (input)
o HDMI source port (output)
• Switches, push-buttons, and LEDs:
o 4 push-buttons
o 2 slide switches
o 4 LEDs
o 2 RGB LEDs
• Expansion Connectors:
o Two standard Pmod ports
§ 16 Total FPGA I/O
o Arduino/chipKIT Shield connector
§ 49 Total FPGA I/O
§ 6 Single-ended 0-3.3V Analog inputs to XADC
§ 4 Differential 0-1.0V Analog inputs to XADC
• Product Compliance:
o HTC: 8471500150
o ECCN: 5A992.c"
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